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| 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-1 about smdk2440 board smdk2440 cpu and base board revision number. cpu board version rev 0.19 base board version rev 0.19 system overview smdk2440 (s3c2440 development kit) for S3C2440A is a platform that is suitable for code development of samsung's S3C2440A 16/32-bit risc microcontroller (arm920t) for hand-held devices and general applications. the S3C2440A consists of 16-/32-bit risc (arm920t) cpu core, separate 16kb instruction and 16kb data cache, mmu to handle virtual memory management, lcd controller (stn & tft), nand flash boot loader, system manager (chip select logic and sdram controller), 3-ch uart, 4-ch dma, 4-ch timers with pwm, i/o ports, rtc, 8-ch 10-bit adc and touch screen interface, iic-bus interface, iis-bus interface, ac97 interface, usb host, usb device, sd host & multimedia card interface, camera interface, 2-ch spi and pll for clock generation. the smdk2440 consists of S3C2440A, boot eeprom (flash rom), sdram, lcd interface, two serial communication ports, configuration switches, jtag interface and status leds. smdk2440 overview the smdk2440 (s3c2440 development kit) shows the basic system-based hardware design which uses the S3C2440A. it can evaluate the basic operations of the S3C2440A and develop codes for it as well. smdk2440 is manufactured by meritech co., ltd and its website is www.mcukorea.com when the S3C2440A is contained in the smdk2440, you can use an in-circuit emulator (multi- ice/realview-ice (rvi)/openice32-a900). this allows you to test and debug a system design at the processor level. in addition, the S3C2440A with multi-ice/ realview-ice (rvi)/openice32-a900 capability can be debugged directly using the multi-ice/ realview-ice (rvi)/openice32-a900 interface. figure 1-1 shows smdk2440 function blocks.
2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. about smdk2440 board S3C2440A 1-2 arm920t jtag arm9tdmi processor core (internal embedded ice) writeback pa tag ram data mmu instruction cache (16kb) instruction mmu external coproc interface amba bus i/f data cache (16kb) bridge & dma (4ch) a h b b u s memory cont. sram/nor/sdram bus cont. arbitor/decode power management interrupt cont. usb host cont. extmaster lcd dma lcd cont. i2c gpio i2s spi 0, 1 adc uart 0, 1, 2 sdi/mmc usb device watchdog timer bus cont. arbitor/decode timer/pwm 0~3,4 (internal) general mcu (S3C2440A) rtc clock generator (mpll/upll) nand cont. nand flash boot loader a p b b u s irda pcmcia i/f keyboard ethernet i/f boot rom (rom bank0) amd or intel strataflash or nand flash adc i/f multi-ice i/f realview i/f openice32-a900 i/f iic i/f uart0 , 1 with handshake dc/dc converter uart2 spi i/f sd (mmc) i/f eint i/f sdram (bank6) tft/stn lcd i/f usb host usb device iis i/f smart media card rtc camera interface camera interface ac97 ac97 figure 1-1. smdk2440 function block diagram 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-3 features ? S3C2440A: 16/32-bit risc microcontroller ? x-tal operation or oscillator ? boot rom: amd 8m bit 1ea (support half-word size boot rom) intel strataflash 16m-byte x 2 ( word: 16m-byte x 2 ea): unload (option) samsung nand flash 64m-byte 1ea (smart media card), samsung nand flash 64m-byte 1ea (sop type) ? sdram: 64m-byte (32m-byte x 2) ? sram: 256k x 16 ? unload(option) ? tft/stn lcd and touch panel interface ? three-channel uart (including irda) ? one host type usb port & selectable device and host type usb port ? sd host (mmc) interface ? smart media card ? jtag port (multi-ice/realview-ice(rvi)/openice32-a900 interface) ? rtc x-tal input logic ? iic with ks24c080 ?adcinterface ? spi interface ? iis interface (sound codec audio input/output) ? ac97 interface (sound codec audio input/output) ? eint interface ? gpio switch interface ? irda interface ? ethernet interface ? pcmcia interface ? extension connector 34p * 3 ea ? led display (debugging) ? camera interface 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. about smdk2440 board S3C2440A 1-4 circuit description the smdk2440 is designed to test S3C2440A and develop software while hardware is being developed. figure 1-3 shows smdk2440's block diagram. power supply smdk2440 is operated by 1.2v for arm core, 1.0v for vddalive, 1,8v for extension i/o, 2.5v/3.3v for memory and 3.3v for i/o pad and several peripherals. smdk2440 is supplied by 9v/2a dc adaptor power. the smdk2440 has distributed power plane, with power going separately to the mcu and the main power plane. for this reason, power jumpers including j4-c~j13-c, j15-c on the cpu board, j11-b and j601-b on the base board are inserted. dc-adapter (9v/2a)supply power connector poly switch s1 3.3 v 5v S3C2440A j4-c(vddmop) j10-c(vddalive) j15-c(vddiarm) j12-c(vddmpll) j13-c(vddi) j5-c(vdd_sdram) j7-c(vddrtc) regulator regulator u27-b regulator j6-c(vddop) u26-b (vdd 3.3v) j601-b regulator u38-b (vdd 2.8v) u9-c 3.3v j8-c(vddadc) j9-c(aref) j11-c(vddupll) (vdd_lcdi) (vdd_5v) (vdd_3.3v) j11-b note: j-b/j-c (jumper on the base board/cpu board) u-b/u-c (unit on the base board/cpu board) (ldvdd) (vdd_3.3v) regulator u18-b (vdd 1.8v) u16-c step-down voltage controller u13-c 5v regulator regulator u17-c figure 1-2. smdk2440 power plane 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-5 ethernet socket pcmcia socket ngcs0 or ngcs4 peripheral S3C2440A (based arm920t) (vddi,vddiarm, vddupll,vddmpll) (vddsdram, vddop,vddadc, vddmop,vddrtc) reset switch eint0,2, 11,19 switch usb host usb device usb host amd flash (bank0 or bank4) strata flash (bank1 or bank0) ngcs1or ngcs0 sdram (bank6) ngcs6 main x-tal (12mhz) data/addr/cont. iis mic spk jack spi connector keyboard cont. max3232c max3232c power led main switch 24v dc/dc converter (3.3v/24v) status led smart media card socket (nand flash) data control rtc x-tal (32.7khz) irda uart ch-1 uart ch-0 uart ch-2 sd socket lcd connector iic realview-ice/ multi-ice (jtag port) adc connector touch panel dc adaptor power 9v/2a regulator (5v) regulator (1.2v) camera i/f connector sram (bank5) ngcs5 ac97 regulator (3.3v) regulator (2.8v) regulator (1.8v) regulator (1.0v) vdd_cam vddalive vdd_1.8v figure 1-3. detailed smdk2440 board diagram 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. about smdk2440 board S3C2440A 1-6 smdk2440 system configurations clock source extclk or x-tal can be selected for the system clock of S3C2440A and usb by the suitable setting of om values. table 1-1. system clock (mpll) & usb clock (upll) pin functions om[3:2] descriptions clock source selection 0 0 mpll: xtal, upll: xtal 0 1 mpll: xtal upll: extclk 1 0 mpll: extclk, upll: xtal 1 1 mpll: extclk, upll: extclk rtc clock 32.768khz, x-tal is available in smdk2440 as the rtc clock source. notes: 1. although the mpll starts just after a reset, the mpll output (mpll) is not used as the system clock until the software writes valid settings to the mpllcon register. before this valid setting, the clock from external crystal or extclk source will be used as the system clock directly. even if the user wants to maintain the default value of the mpllcon register, the user should write the same value into the mpllcon register. 2. om[3:2] is used to determine test mode when om[1:0] is 11. reset logic the nreset (system reset signal) must be held to low level at least 4 clks to recognize the reset signal and it takes 128 clks between the nreset and internal nreset. nreset and ntrst (jtag reset signal) are connected through jumper j3-c on the cpu board. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-7 boot rom (bank0) the data bus width of bank0 can be configured in byte, half-word or word in S3C2440A. in the case of smdk2440, half-word data bus width (amd flash memory), half-word or word data bus width (strata flash memory), and byte or half-word data bus width (samsung nand flash memory) access can be selected by the suitable jumper setting. amd flash or strata flash memory can be selected by using jumper (j3-b & j4-b) option for boot rom. in the smdk2440, the data bus width of amd flash memory is fixed by half-word data width (16-bit) and strata flash memory can use word (32-bit). but amd flash and strata flash cannot be selected for bank0 or bank1 at the same time. data bus width of bank0 should be set by memory type of bank0. it is set by om[1:0](j2-b & j1-b). smc_nfce sop_nfce 1 2 3 j9-b 1 2 3 j9-b bank0 -nand flash sop type ngcs1 ngcs0 1 2 3 j3-b ngcs4 ngcs0 1 2 3 j4-b bank0 - intel strata flash 32bit ngcs1 ngcs0 1 2 3 j3-b ngcs4 ngcs0 1 2 3 j4-b bank0 - amd flash 16bit nce_s32 nce_a16 nce_s32 nce_a16 nfce bank0 -nand flash smc type sop_nfce smc_nfce figure 1-4. smdk2440 board memory configurations 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. about smdk2440 board S3C2440A 1-8 table 1-2. memory type and data bus width j3-b j4-b pin functions 1-2 2-3 1-2 2-3 descriptions open short short open amd flash memory : bank0 strata flash memory : bank1 data bus width of bank0 : half-word data bus width of bank1 : word bank0/1/4 memory type selection and data bus width configuration short open open short amd flash memory : bank4 strata flash memory : bank0 data bus width of bank0 : word data bus width of bank4 : half-word table 1-3. boot memory type and bus width configuration om[1:0] pin functions j1-b [om0] j2-b[om1] descriptions 2-3(l) 2-3(l) nand boot 2-3(l) 1-2(h) word (32-bit) 1-2(h) 2-3(l) half word (16-bit) boot memory type and bus width configuration 1-2(h) 1-2(h) test mode nand flash configuration table 1-4. nand flash type selection om[1:0] = nand boot setting ( l, l ) 2-3(l) 1-2(h) j5-b ( ncon 0 ) normal nand advanced nand 2-3(l) 256 1024 j6-b ( page ) 1-2(h) 512 2048 2-3(l) 3 cycle 4 cycle j7-b (addr) 1-2(h) 4 cycle 5 cycle 2-3(l) 8-bit bus width j8-b (width) 1-2(h) 16-bit bus width 2-3(l) use smc nand j9-b ( nand select) 1-2(h) use sop nand note: - jumpers on the base board: j1-b, j2-b, j3-b, ? 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-9 general i/o ports the S3C2440A's general i/o ports are used for smdk2440 key interrupt input, normal input and led status display. the function of control switch and the status of led can be defined by user software. table 1-5. general i/o configurations on smdk2440 general i/o port number i/o type descriptions gpf[7:4] output led display gpf0, gpf2, gpg3 & gpg11 input key input pad (external interrupt input pins). (eint0,2,11&19) u4 (epm7032) xdma channel selection table 1-6. u4-c xdma channel selection pin functions j1-c j2-c descriptions (1-2) (1-2) nxdreq0, nxdack0 xdma channel selection (2-3) (2-3) nxdreq1, nxdack1 note: - jumpers on the cpu board: j1-c, j2-c, j3-c, ? 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. about smdk2440 board S3C2440A 1-10 lcd interface tft/stn lcd controllers are equipped in the S3C2440A. tft/stn lcd, touch panel and lcd backlight driver are supported in the smdk2440. notes: it is supported 2-type sec tft lcd panel(samsung 3.5? portrait/256 color/reflective a tft lcd) lts350q1-pd1 panel with touch panel and front light unit lts350q1-pd2 panel only lts350q1-pe1 panel with touch panel and front light unit lts350q1-pe2 panel only touch screen con6 3 2 1 4 tsym tsyp tsxm tsxp figure 1-5. touch panel film connector on smdk2440 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-11 spi connector figure 1-6 shows the way smdk2440 provides spi (con15) signals. figure 1-6. spi connector on smdk2440 a/d converter interface the S3C2440A has analog to digital converter (adc). the adc has 8-ch analog input signals. the smdk2440 provides the adc (con8) signals as follows: table 1-7. adc interface on smdk2440 # of pin descriptions # of pin descriptions # of pin descriptions # of pin descriptions 1 ain0 4 ain3 7 tsxm 10 gnd 2 ain1 5 tsym 8 tsxp 3 ain2 6 tsyp 9 eint20 con15 3 2 1 4 spimosi spiclk spimiso 5 nss_spi 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. about smdk2440 board S3C2440A 1-12 sd host (mmc) interface sd(mmc) is provided by the S3C2440A and sd card socket (con13) is supported in the smdk2440 con13 8 10 11 7 vdd3.3v 5 6 4 sddata1 gnd 3 1 2 9 sddata0 sdclk sdcmd sddata3 sddata2 ncd_sd wp_sd figure 1-7. sd card socket on smdk2440 iic interface serial eeprom s524c80d80 (ks24c080) access function is provided by smdk2440 and there is also iic interface between S3C2440A and camera module through u37-b (cbtd3306) buffer. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-13 usb interface dual usb connector(con3) for two usb port a-type and one usb port b-type(con5) are supported by the smdk2440. usb port b-type (usb device) con5 3 2 1 4 dn1(d-) gnd dp1(d+) vbus resister usb port a-type (usb host) con3b 3 2 1 4 dn1(d-) vdd5v gnd dp1(d+) vbus usb port a-type (usb host) con3a 3 2 1 4 dn0(d-) vdd5v gnd dp0(d+) vbus figure 1-8. usb ports on smdk2440 you can be select the usb port 1 (dn1, dp1) by jumper (j14-c, j16-c) 1 2 3 j14-c a-type con b-type con a-type con b-type con 1 2 3 j16-c usb port1 a-type connection(usb host) dn1 dp1 1 2 3 j14-c a-type con b-type con a-type con b-type con 1 2 3 j16-c usb port1 b-type connection(usb device) dn1 dp1 figure 1-9. usb port1 selection 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. about smdk2440 board S3C2440A 1-14 uart interface the S3C2440A uart unit provides three independent asynchronous serial i/o (sio) ports including irda. in smdk2440 board, a user can change the ports connected to connectors by setting related jumpers. table 1-8. uart configurations pin functions j16-b, j18-b j17-b, j19-b descriptions (2-3) (1-2) con14: uart0, con22: uart1 uart configurations (1-2) (2-3) con14: uart0, con22: uart2 con14 (female) con22 (female) 1 6 2 7 3 8 4 9 5 x x x x ncts1 txd1(txd2) rxd1(rxd2) nrts1 1 6 2 7 3 8 4 9 5 x ncts0 txd0 rxd0 nrts0 gnd ndcd ndtr ndsr gnd figure 1-10. uart ports on smdk2440 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-15 irda interface irda is supported by smdk2440 and j17-b and j19-b should be set to uart2 (rxd2 and txd2) for irda. 1 2 3 j17-b txd2 irtxd txd2 1 2 3 j19-b rxd2 irrxd rxd2 figure 1-11. smdk2440 board irda configurations table 1-9. irda configurations pin functions j17-b, j19-b descriptions uart2 (2-3) set uart mode irda (1-2) set irda mode 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. about smdk2440 board S3C2440A 1-16 extension connector interface table 1-10. extension connector (con10, con11 & con12) on smdk2440 # of pin descriptions # of pin descriptions # of pin descriptions # of pin descriptions 1 gnd 10 data8 19 data17 28 data26 2 data0 11 data9 20 data18 29 data27 3 data1 12 data10 21 data19 30 data28 4 data2 13 data11 22 data20 31 data29 5 data3 14 data12 23 data21 32 data30 6 data4 15 data13 24 data22 33 data31 7 data5 16 data14 25 data23 34 ? 8 data6 17 data15 26 data24 ? ? 9 data7 18 data16 27 data25 ? ? # of pin descriptions # of pin descriptions # of pin descriptions # of pin descriptions 1 gnd 10 a8 19 a17 28 nwbe0 2 a0 11 a9 20 a18 29 nwbe1 3 a1 12 a10 21 a19 30 nwbe2 4 a2 13 a11 22 a20 31 nwbe3 5 a3 14 a12 23 a21 32 nwe 6 a4 15 a13 24 a22 33 noe 7 a5 16 a14 25 a23 34 ? 8 a6 17 a15 26 a24 ? ? 9 a7 18 a16 27 nwait ? ? # of pin descriptions # of pin descriptions # of pin descriptions # of pin descriptions 1 ngcs2 10 gpg7 19 nxdack1 28 gnd 2 ngcs1 11 gpg2 20 nxdreq0 29 gnd 3 ngcs4 12 gpg8 21 gpg5 30 nreset 4 ngcs3 13 gpg3 22 nxdreq1 31 vdd5v 5 ngcs7 14 gpg9 23 vdd1.8v 32 vdd3.3v 6 ngcs5 15 gpg4 24 gpg12 33 clkout1 7 gpg0 16 gpg10 25 gnd 34 gnd 8 gpg6 17 nxdack0 26 clkout0 ? ? 9 gpg1 18 gpg11 27 vdd3.3v ? ? 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-17 camera interface connector figure 1-12 shows the connector pin assignment for camera interface on smdk2440 con19 gnd xpclk xcamclk xiicscl x x x xcam_y1 xcam_y3 xcam_y5 xcam_y7 xvsync x x n x d a ck0 xcam_y0 xcam_y2 xcam_y4 xcam_y6 xcamrst nxcamrst xhsync xiicsda vdd2.8v vdd5v vdd2.8v figure 1-12. camera interface connector on smdk2440 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. about smdk2440 board S3C2440A 1-18 iis & ac97 interface smdk2440 supports the iis & ac97 interface. because ac97 controller and the iis controller must not be used at the same time, only one interface of them should be selected by using following resistor configuration. table 1-11. iis or ac97 interface selection on smdk2440 ac97 iis rn1, rn3, r280 short open rn2, rn4, r281 open short rn1 rn2 ac97_lo ac97_ro ac97_mi iis_lo iis_ro iis_mi 0(unload) 0 head phone 123 mic rn3 rn4 x97sdi x97sdo x97bitclk x2sdi x2sdo x2sclk 0(unload) 0 1 2 x97sync x2slrck x2scdclk x97resetn r280 r281 0 cdclk i2ssdi i2ssdo i2ssclk i2slrck 1 2 3 45 6 7 8 1 2 3 4 5 6 7 8 1 2 3 45 6 7 8 1 2 3 45 6 7 8 0(unload) figure 1-13. iis or ac97 configurations 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A about smdk2440 board 1-19 notes 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-1 toolkit and debugging smdk2440 environment setup the evaluation environments for the smdk2440 are shown in figure 2-1. the serial port (uart1) on the smdk2440 has to be connected to com port of the host pc. this can be used as a console for monitoring and debugging the smdk2440. and the usb device on the smdk2440 should be connected to the usb host of the host pc for downloading test images. ifyouhaveanemulatorsuchas multi-ice , realview ice(rvi) and openice32-a900, you can use jtag port on the smdk2440 to interface the emulator. lpt1 usb host usb host usb device jtag S3C2440A sm dk2440 m u l t i-ic e / realview ice/ openice32-a900 host pc usb cable 5v 3.3v adapter dc9v 1.2v regulator uart1 com2 rs232 cable usb regulator r egulators eth figure 2-1. setup environment for smdk2440 board 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-2 rs232c cable connection the serial cable is made as in figure 2-2. the pins numbered only 2, 3, and 5 are used; make sure to check the cable's connections to prevent other pins from being used. the uart1(con22) and pc com1 or com2 port has to be connected through this cable connection. for host (female d-sub9) for smdk2440 (male d-sub9) 5 3 2 5 3 2 figure 2-2. serial cable connections for smdk2440 board 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-3 usb downloader installation (on windows 98, me, 2000 or nt) to install the usb downloader, follow the steps: 1. program the u2440mon.bin into the flash memory of smdk2440x board. 2. configure boot jumper setting (j1-b ~ j9-b). 3. turn on the smdk2440. 4. if you installed the device driver for smdk2400x/smdk2440x before, overwrite new ?secbulk.sys? at c:\windows\system32\drivers. in this case, the step 6 will be skipped. 5. connect the smdk2440x board with the pc (see figure 2-3). 6. when the usb device driver installation window appears, install the usb device driver (secbulk.inf). note: ?secbulk.inf? and ?secbulk.sys? should be in the same directory (see figure 2-4). 7. run ?dnw.exe?. 8. turn the smdk2440 off and then on. 9. the message ([usb:ok]) in the window title bar indicates that the installation is successfully completed. figure 2-3. add new hardware wizard (window98) notes: 1. if you have installed the device driver before, replace the old 'secbulk.sys' in c:\windows\system32\drivers with the new 'secbulk.sys'. 2. the maximum speed of the 'secbulk.sys' with smdk2440 will be about 980kb/s. 3. 'dnw.exe': pc usb/serial downloader program. 4. 'secbulk.inf' and 'secbulk.sys': pc usb driver. 5. 'u2440mon.bin': S3C2440A usb downloader firmware. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-4 figure 2-4. usb device driver installation 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-5 figure 2-4. usb device driver installation (continued) configuring dnw to configure the dnw, which works as usb and serial download utility, follow the steps: 1. run the dnw. 2. select options from the configuration menu (see figure 2-5). configuration options 3. select baud rate for serial communication. serial communication properties of the dnw are as follows: data bits:8-bit / stop bits:1 / no flow control 4. select a com port of the host pc to communicate with the smdk2440. 5. set usb download address. 6. click the ok button. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-6 figure 2-5. setting uart/usb options 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-7 connect host pc and smdk2440 with dnw after setting uart/usb options, users can activate uart and usb communication. 1. select connect from the serial port menu. serial port connect 2. power on the smdk2440 (see figure 2-6). figure 2-6. power on screen 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-8 install arm toolkit first of all, install arm toolkit 2.51, ads (arm developer suite) 1.0.1 or ads1.1. if you installed arm toolkit 2.11a, then makefile has to be changed a little. the toolkit 2.11a cannot support fromelf.exe utility. we recommend arm developer suite 1.0.1, which is used in our development environment. we also recommend ads 1.1. the dos environment variable has to be changed as follows after the installation of arm toolkit 2.51. set armlib=c:\arm251\lib \ embedded set arminc=c:\arm251\include how to build executable image file executable image file can be built by using the arm project manager or makefile. first, you have to build elf format image (*.elf or *.axf). an elf format image can be used for the arm debugger directly. the binary file (.bin file) can be extracted from elf format image. first of all, you have to download S3C2440A evaluation source code and any other utilities from our web site (www.samsungsemi.com). they are helpful for you to understand the development environments of S3C2440A in an easier way. the distributed evaluation source code consists of following directories. directory description bmp graphic header file converted from bmp file obj object files err error files building 2440test.axf (or 2440test.elf) to build the sample source code, 2440test, run makefile using the following commands. cd 2440test armmake ?a or cd 2440test make clean make after the procedure, 2440test.axf (or 2440test.elf) and 2440test.bin image files will be seen in 2440test directory. the 2440test.axf (or 2440test.elf) file is used for arm debugger. the 2440test.bin file is used for downloading through usb. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-9 executing 2440test without arm multi-ice or openice32-a900 first, u2440mon has to operate on rom. u2440mon will be ready to receive 2440test.bin. u2440mon will launch 2440test.bin after receiving 2440test.bin. to download 2440test.bin through usb, after connecting the host pc and the smdk2440 with the dnw follow the steps below: 1. select transmit from the usb port menu. usb port transmit 2. select 2440test.bin (see figure 2-7). 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-10 figure 2-7. 2440test execution after its downloading through usb 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-11 how to use arm debugger with arm multi-ice if you have built 2440test program without any error, you can find 2440test.axf in 2440test directory. the generated image file will be downloaded to sdram memory on the smdk2440 by arm debugger through mds like a multi-ice. next, you can start to debug the downloaded image using the adw (arm debugger for windows). if you didn?t apply the patch for multi-ice v2.2, you must follow the below procedure. but, if you were applied the patch for multi-ice v2.2 which can download at http://www.arm.com without payment, you can very easily to use the multi-ice. because, you can setup the multi-ice server program by ?auto-configure? menu. preparing and configuring arm multi-ice 1. multi-ice will be connected through jtag port on the board. connect all cables properly following its manual. 2. start the arm multi-ice server (double click the multi-ice server icon). 3. select load configuration from file menu and load 2440.cfg (see figure 2-8). file load configuration 4. contents of 2440.cfg are as follows: [title] s3c2440/s3c2440 tap configuration [tap 0] arm920t [timing] adaptive=off 5. select start-up options from settings menu. settings start-up options 6. start-up options dialog box is displayed (see figure 2-9). now you can select load configuration from start-up configuration and browse 2440.cfg 7. start arm debugger using arm debugger icon also, you can start the debugger at dos command window by typing adw 2440test.axf. ifyouusearmmulti-iceforthefirsttime,youhavetoaddmulti-ice.dlltoadw. 8. when arm debugger is started, it will load the image code to the armulator (the armulator is software emulator for arm920t cpu). 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-12 figure 2-8. load configuration figure 2-9. start-up configuration 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-13 configuring arm debugger for arm multi-ice in order to access a remote target, you should configure arm debugger for windows (adw) or arm extended debugger(axd). there are two kinds of adw: one for software development toolkit (sdt) and the other for arm developer suit (ads). these two kinds of adw are basically same except some trivial differences. the below explanation will be described with axd of arm developer suit (ads). the multi-ice interface unit must also be configured for the arm core in the target system. the arm920t core is contained in the S3C2440A on the smdk2440 board. to configure axd debugger using the multi-ice interface, follow the steps: 1. select configure debugger from the options menu. options -> configure target 2. debugger configuration dialog box is displayed (see figure 2-10). if there is no multi-ice in the target environment, then you have to select add button and multi-ice.dll. ? armulator: lets you execute the arm program without any physical arm hardware by simulating arm instructions in software. ? multi-ice: connects the axd debugger directly to the target board or to a multi-ice unit attached to the target. 3. select multi-ice from target environment, and click the configure button. 4. configure arm multi-ice dialog box (see figure 2-11). ? connect page: select your host and multi-ice communication target configuration. ? processor settings page: set the cache clean code address. 5. select advanced from debugger configuration dialog box (see figure 2-12) and configure it. ? endian: little (if the big endian is used, endian: big has to be selected.) 6. if you click the ok button on debugger configuration dialog box, the debugger will be restarted. the restarting dialog box is displayed and numbers are rapidly changing, indicating that it is reading and writing to the target. this means that the executable image file is downloaded to the sdram code area. this configuration is initially done and the setting is saved, which relieves the user of repeating another configuration next time. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-14 figure 2-10. debugger configuration: target page 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-15 figure 2-11. arm multi-ice: connect page and processor settings page 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-16 figure 2-12. debugger configuration: advanced page 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-17 executing 2440test.axf using arm multi-ice 1. initialize internal variables of the debugger. after a downloading, several windows are displayed, such as execution window, console window, and command window. in command window, you should initialize the internal variables of the debugger, "$semihosting_enabled" and "$vector_catch", by entering the following command: swat $vector_catch 0x00 swat $semihosting_enabled 0x00 ;to use all h/w break points swat psr %ift_svc ;to disable all interrupts com swat psr %if_svc32 or, you can initialize these variables as follows: first, create a text file named "2440norom.ini", which includes the commands described above. then, enter the following command in the command window (see figure 2-13): obey c:\work\2440\2440norom \ 2440norom.ini for more information about these steps, refer to the reference document released by arm. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-18 figure 2-13. arm extended debugger window (axd): command window 2. set breakpoint at main in 2440test.c as follows: break main 3. execute the program by clicking execute menu go. the program execution will stop at main( ). 4. now, the downloaded image file will run on sdram area. 2440test program running status can be monitoredonthednw. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-19 multi-ice checkpoints 1. error messages refer to error messages of the multi-ice user's guide. if you cannot solve the problem by using the instructions in the user's guide, then apply the 'force 4-bit access" option. 2. multi-ice current consumption problem multi-ice draws the multi-ice operating current from a target board. the current is about 130ma at 3.3v. if the target board cannot supply the 130ma, an external power supply must be used for supplying the current to multi- ice. 3. ntrst, tms, tck and tdi pin connections tms, tck and tdi pin must be pulled-up with 10k registers. if the multi-ice is not used when development is completed, ntrst must be 'l' level at least during the reset. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-20 executing 2440test.axf using arm realview ice (rvi) 1. initialize internal variables of the debugger. after a downloading, several pane are displayed, such as register pane, call stack pane, watch pane, memory pane and output pane. in cmd tab of output pane, you should initialize the internal variables of the debugger, "@ semihost_enabled " and " semihost_vector ", by entering the following command: setreg @semihost_vector=0x0 setreg @semihost_enabled= 0x0 ;to use all h/w break points setreg @cpsr=0xd3 ;to disable all interrupts or, you can initialize these variables as follows: first, create a text file named "2440norom-rv.inc", which includes the select with window environment. more detail inform, you can get the realview debugger manual by arm. 1. select ?include commands from file?? from the debug menu. debug -> include commands from file? 2. select ?2440norom-rv.inc? file from the file open dialog box. for more information about these steps, refer to the reference document released by arm. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-21 how to use realview debugger (rvd) with realview ice(rvi) to connect to your target hardware using a realview ice interface unit, you use the same realview debugger features that you use for any other target. you must ensure that you use the realview ice target vehicle. to do so, use the nodes in the connection control window that are descendents of the arm-arm-nw target vehicle node, as shown as following. when connecting, you might see the error shown as following. this error appears when the software detects that there is already a connection to the target. this might be because someone else is connected to the target, or it might be because a connection has been left open by software that exited incorrectly. configuring realview debugger for realview ice to debug the target board with realview ice(rvi), you should configure realview debugger(rvd). as realview ice should be connected through jtag port on the board and switched on. to configure realview debugger(rvd) for realview ice interface, follow the steps: 1. turn on the power (target board) ensure that the target is correctly connected and powered, then turn on the power to rvi. this will take approximately 30 seconds. you can tell this has completed as one of the leds beside the jtag connector will come on (after first flashing, and then switching off for a short time). you must wait for this to complete. 2. launch rvd and access the connection control window select file -> connection -> connect to target to launch the connection control windows. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-22 click on the cross to the left of the arm-arm-nw entry to display the realview ice brach. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-23 3. create a new jtag configuration file click on the cross to expand the realview ice branch. a list selection dialogue will appear: select configure device information? and click ok. 4. configure the realview ice interface unit the rvconfig dialogue should now be visible. locate the rvi unit on the network by using the browse button. a. connecting over a tcp/ip network click on the browse button. the tcp/ip browse dialog appears, and your computer starts scanning the tcp/ip network for available realview ice units, adding them to the dialog as it founds them. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-24 b. when you have chosen the realview ice unit that you want to use, click connect . a connection is established to the unit. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-25 after connection, you can see the following screen. click the connect and then click auto configure scan-chain now rvi should connect to your target board: -- generally device with arm cores. now, the realview debugger cannot recognize the samsung id code. so, you must add the new device by handcrapt. click remove device , and add device button. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-26 now you can select the arm core by handcrapt for your target. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-27 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-28 1. configuring device enter the value 0x33ffff00 in the code sequence code address item. enter the value 0x000000ff in the code sequence code size item. select file -> save before file -> exit . now, save the current configuration and close the configuration dialogue. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-29 2. connect to the target return to the rvd connection control window and expand the realview ice branch, then connect to the target: click arm920t_0 item. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-30 3. confirm the connection now, your rvd, rvi, target board connection were completed and you can see the following figure : 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-31 how to use arm debugger with openice32-a900 followings explain how to download the compiled image to sdram memory on the smdk2440 by arm debugger through openice32-a900, an emulator for arm processor. configuring arm debugger for openice32-a900 to debug the target board with openice32-a900, you should configure arm debugger for windows (adw) or arm extended debugger (axd). as multi-ice, openice32-a900 should be connected through jtag port on the board and switched on. to configure arm debugger for openice32-a900 interface, follow the steps: 1. select configure debugger from the options menu. options -> configure target 2. debugger configuration dialog box is displayed (see figure 2-14). if there is no openice32-a900 in the target environment box, then you have to click on the add button and select openice32-a900.dll. ? armulator: lets you execute the arm program without any physical emulator by simulating arm instructions in software. ? openice32-a900: connects the arm debugger to openice32-a900 attached to the target board. 3. select openice32-a900 from the target environment box, and click the configure button. figure 2-14. debugger configuration: target page 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-32 4. configureopenice32-a900 dialog box (see figure 2-15, 2-16). ? remote page: select the connection to openice32-a900. figure 2-15. openice32-a900 configuration: communication setting page ? debugger page : set the endian and decide where initializes S3C2440A without any boot rom. endian : little (if the big endian is used, endian: big has to be selected.). it should be matched with the option that you set in the compiler. to init smu : if you want to initialize S3C2440A on the board without any boot rom, check it and set smu in the smu page, (don?t check it in this application.) flashdownload:ifimagefilewillbedownloadedtoaflashdevice,checkitandsetoptionsinthe flash config page. (don?t check it in this application.) figure 2-16. openice32-a900 configuration: endian and smu setting page 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-33 ? smu page: set smu of S3C2440A. select smdk2440 or S3C2440A from the device name and modify the values.(no need to set it in this application). smu of s3c2440 is the same as s3c2410. so, if you cannot find s3c2440 from the device name, then you may select smu of s3c2410 instead of s3c2440. figure 2-17. openice32-a900 configuration: smu setting page ? flash config page: set options for flash download. (no need to set it in this application). figure 2-18. openice32-a900 configuration: flash configuration setting page 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-34 5. if you click the ok button on choose target dialog box (see figure 2-19), the debugger will be restarted. the restarting dialog box is displayed and numbers are rapidly changing, indicating that it is reading and writing to the target. this means that the executable image file is downloaded to the sdram code area. figure 2-19. debugger configuration: choose target this configuration is initially done and the setting is saved, which relieves the user of repeating another configuration next time. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-35 executing 2440test.axf using openice32-a900 1. select load image from the file menu and select the compiled image (2440test.axf). then it will be downloaded to the sdram on the board. 2. execute the program by select go from the execute menu. 3. now, the downloaded image file will run on sdram area. 2440test program running status can be monitoredontheaxd. figure 2-20. arm extended debugger (axd): after downloading 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-36 debugging downloaded image in adw or axd stepping through program to step through the program execution flow, you can select one of the following three options: ? step: advances the program to the next line of code that is displayed in the execution window. ? step into: advances the program to the next line of code that follows all function calls. if the code is in a called function, the function source is displayed in the execution window and the current code. ? step out: advances the program from the current function to the point from which it was called immediately after the function call. the appropriate line of code is displayed in the execution window. setting breakpoint a breakpoint is the point you set in the program code where the arm debugger will halt the program operation. when you set a breakpoint, it appears as a red marker on the left side of the window. to set a simple breakpoint on a line of code, follow these steps: 1. double-click the line where you want to place a break, or choose toggle breakpoint from the execute menu. the set or edit breakpoint dialog box is displayed. 2. set the count to the required value or expression (the program stops only when this expression is correct). to set a breakpoint on a line of code within a particular program function: 1. display a list of function names by selecting function names from view menu. 2. double-click the function name you want to open. a new source window is displayed containing the function source. 3. double-click the line where the breakpoint is to be placed, or choose toggle breakpoint from the execute menu. the set or edit breakpoint dialog box appears. 4. set the count to the required value or expression (the program stops only when this expression is correct). setting watch point a watch point halts a program when a specified register or a variable, which is set to a specific number, is about to be changed. to set a watch point, follow these steps: 1. display a list of registers, variables, and memory locations you want to watch by selecting the registers, variables, and memory options from the view menu. 2. click the register, variable, or memory area in which you want to set the watch point. then, choose set or edit watchpoint from the execute menu. 3. enter a target value in the set or edit watchpoint dialog box. program operation will stop when the variable reaches the specified target value. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-37 viewing variables, registers, and memory you can view and edit the value of variables, registers, and memory by choosing the related heading from the view menu: ? variables: for global and local variables. ? registers: for the current mode and for each of the six register view modes. ? memory: for the memory area defined by the address you enter. displaying code interleaved with disassembly if you want to display the source code interleaved with disassembly, choose toggle interleaving on the options menu. this command toggles between displaying source only and displaying source interleaved with disassembly. when the source code is shown interleaved with disassembly, machine instructions appear in a lighter gray color. for additional information about arm debugger, refer to the reference document released by arm. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-38 debugging downloaded image in realview debugger(rvd) select file load image... from the code window main menu to load an image to a processor for execution. this displaystheloadfiletotargetdialogboxshownasfollowing . this dialog box contains controls to configure the way the image is loaded for execution: symbols only by default, any object file loaded from this dialog box also loads the symbols. if you want to load only the symbols then select this check box, for example when you are working with rom images. if the program was initially compiled without a symbol table then you must recompile the program before loading only the symbols. replace existing file(s) by default, loading a new image overwrites any image currently loaded to the target. if you are working with multiple applications, use this check box to carry out separate loads of associated modules such as an rtos and associated applications. target name: use this field to enter the target name, where supported. a name entered here is then used as the argument to a load command (see specifying the load instruction). 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-39 arguments : use this field to enter a space-separated list of arguments to the image. entries in this field create an arguments list used with the load command (see specifying the load instruction). pc when you load an image to the debug target you can optionally set the program counter (pc): auto-set pc selected by default, this control defines the location of the pc when you load an image. realview debugger tracks the state of the other check boxes on this dialog box and sets the pc at the normal entry point, if you select the check box replace existing file(s). unselect the auto-set pc check box to have control over the pc when you load an image. set pc to entry point where selected, realview debugger sets the pc at the start address specified in the object module. this is the default if you select both: auto-set pc replace existing file(s). unselect the set pc to entry point check box to prevent the load command setting the pc. if you have started realview debugger and are connected to a debug target, you can load an image for execution from the process control pane: 1. select view -> pane views -> process control pane from the default code window main menu to display the process control pane. whilst there is no image loaded, the pane only shows details about the debug target processor and the current location of the pc. 2. right-click on the top line, the process entry, to display the process context menu. whilst there is no image loaded, you can also display this menu from the image entry. 3. select load image... to display the load file to target dialog box. 4. completetheentriesinthedialogbox,describedinusingtheloadfiletotargetdialogbox,toloadthe required image. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-40 executing 2440test.axf using realview ice(rvi) 1. select load image from the file menu and select the compiled image (2440test.axf). then it will be downloaded to the sdram on the board. 2. execute the program by select go from the execute menu. 3. now, the downloaded image file will run on sdram area. 2440test program running status can be monitored on the realview debugger (rvd) . figure 2-21. realview debugger (rvd): after downloading 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-41 switching development toolkit usb boot code (u2440mon.c) and test code (2440test.c) can be executed in the sdt or ads by changing the option in option.h and makefile. in other words, boot and test code can be translated from ads to sdt and vice versa by changing option in the following table. table 2-1. toolkit switching options ads sdt makefile fromelf -nodebug -bin -output $(prj).bin $(prj).elf fromelf -nodebug -nozeropad $(prj).elf -bin $(prj).bin option.h #define ads10 true #define ads10 false translating code from ads into sdt u2440mon and 2440test codes were optimized for ads 1.0. in other words, these codes were compiled and linked by the ads 1.0. so, these codes should be modified to work on the sdt. if you want to compile our codes with the sdt, then you have to change the definition of ads1.0 in option.h from 'true' to 'false' and the option in makefile from 'fromelf -nodebug -bin -output $(prj).bin $(prj).elf' to 'fromelf -nodebug -nozeropad $(prj).elf -bin $(prj).bin? option. translating code from sdt into ads first function __rt_lib_init(); is applied to the main code. and then old makefile for sdt is changed to a new one for ads. if you have used sdt 2.50, it is recommended that you should read related documents (ads, getting started, and arm dui0064a) about the difference between sdt 2.50 and ads 1.0. removed or changed items from makefile for sdt 2.50 1. armlink option ? first: the path of an object file is not needed. 2. armasm option ? cpu: should be changed as -cpu arm920t ? apcs: should be changed to -apcs /noswst 3. compiler option ? fc : should be removed. ? zpz0 : should be removed. this is not needed any more. ? apcs : should be changed to -apcs /noswst ? processor : should be removed. ? arch : should be removed. ? cpu : should be added as -cpu arm920t 4. fromelf.exe ? nozeropad: should be removed. this is not needed any more. ? output : command line style should be changed using -output option as follows: fromelf -nodebug -bin -output $(bin)\$(prj).bin $(bin)\$(prj).axf 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-42 other items should be changed for ads 1.0 1. ammake.exe the armmake.exe is not supplied with ads 1.0. so, you have to use your own make utility. (nmake.exe, make.exe, pmake.exe, or armmake.exe in sdt 2.50). 2. embedded library there is no separate embedded library in ads 1.0. all the library in ads 1.0 is made for embedded applications. but, the library must be initialized using __rt_lib_init() function. if you do not use __rt_lib_init(), the c library does not work well. 3. there is no tasm.exe. the tasm.exe is merged into armasm.exe. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A toolkit and debugging 2-43 example of makefile for ads 1.0 this is a sample makefile on ads 1.0. ##### file definition #### prj = 2440test init= 2440init am1 = 2440slib am2 = 2440swis cm1 = 2440lib cm2 = mmu cm3 = 2440iis cm4 = timer cm5 = 2440rtc cm6 = 2440iic . . . cm38 = spi cm39 = strata32 #### destination path definition #### obj=.\obj err=.\err #### arm tool definition #### armlink = armlink armasm = armasm armcc = armcc #### option definition #### lflags = -ro-base 0x30000000 -elf -map -xref \ -list list.txt -first $(init).o(init) aflags = -li -apcs /noswst -cpu arm920t cflags = -c -g+ -li -apcs /noswst -cpu arm920t #### object combine definition #### objs = $(obj)\$(init).o $(obj)\$(am1).o $(obj)\$(am2).o $(obj)\$(prj).o \ $(obj)\$(cm1).o $(obj)\$(cm2).o $(obj)\$(cm3).o $(obj)\$(cm4).o \ $(obj)\$(cm5).o $(obj)\$(cm6).o $(obj)\$(cm7).o $(obj)\$(cm8).o \ $(obj)\$(cm9).o $(obj)\$(cm10).o $(obj)\$(cm11).o $(obj)\$(cm12).o \ $(obj)\$(cm13).o $(obj)\$(cm14).o $(obj)\$(cm15).o $(obj)\$(cm16).o \ $(obj)\$(cm17).o $(obj)\$(cm18).o $(obj)\$(cm19).o $(obj)\$(cm20).o \ $(obj)\$(cm21).o $(obj)\$(cm22).o $(obj)\$(cm23).o $(obj)\$(cm24).o \ $(obj)\$(cm25).o $(obj)\$(cm26).o $(obj)\$(cm27).o $(obj)\$(cm28).o \ $(obj)\$(cm29).o $(obj)\$(cm30).o $(obj)\$(cm31).o $(obj)\$(cm32).o \ $(obj)\$(cm33).o $(obj)\$(cm34).o $(obj)\$(cm35).o $(obj)\$(cm36).o \ $(obj)\$(cm37).o $(obj)\$(cm38).o $(obj)\$(cm39).o 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. toolkit and debugging S3C2440A 2-44 all: $(prj).axf clean: del $(obj)\*.o $(prj).axf: $(objs) del $(prj).bin del $(prj).axf $(armlink) $(lflags) -o $(prj).axf $(objs) fromelf -nodebug -bin -output $(prj).bin $(prj).axf #for sdt2.5 fromelf -nodebug -nozeropad $(prj).elf -bin $(prj).bin #for ads1.0 fromelf -nodebug -bin -output $(prj).bin $(prj).elf $(obj)\$(prj).o: $(prj).c 2440addr.h 2440lib.h makefile del $(obj)\$(prj).o del $(err)\$(prj).err $(armcc) $(cflags) $(prj).c -o $(obj)\$(prj).o -errors $(err)\$(prj).err . . . . . $(obj)\$(cm27).o: $(cm27).c 2440addr.h 2440lib.h makefile del $(obj)\$(cm27).o del $(err)\$(cm27).err $(armcc) $(cflags) $(cm27).c -o $(obj)\$(cm27).o -errors $(err)\$(cm27).err $(obj)\$(cm28).o: $(cm28).c 2440addr.h 2440lib.h makefile del $(obj)\$(cm28).o del $(err)\$(cm28).err $(armcc) $(cflags) $(cm28).c -o $(obj)\$(cm28).o -errors $(err)\$(cm28).err $(obj)\$(cm29).o: $(cm29).c 2440addr.h 2440lib.h makefile del $(obj)\$(cm29).o del $(err)\$(cm29).err $(armcc) $(cflags) $(cm29).c -o $(obj)\$(cm29).o -errors $(err)\$(cm29).err . . . . . 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-1 programming flash memories programming nand flash memory the smdk2440 supports nand flash control interface. there are only one methods to write images to nand flash memory: ? write image files to nand flash memory with write-program. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-2 nand flash write with write-program the target image must be downloaded in sdram before executing write-program. to download and write a target image from the host to sdram through usb interface, follow the steps: 1. run the dnw utility program (see figure 3-1). figure 3-1. dnw window to download 2. select serial port on the system menu of dnw and click connect to open the serial port (see figure 3-2, 3). figure 3-2. dnw window (to connect serial port) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-3 figure 3-3. dnw window (after open baud-rate is printed on title bar) 3. connect the serial and usb cable from the host pc to smdk2440 system and turn on the power of smdk2440 board (see figure 3-4). notes: 1. jumper j1-b, j2-b, j3-b, j4-b must be ?h?, ?l?, ?l? and ?h? for amd nor booting. 2. smdk2440 must run monitor program that is provided by samsung. figure 3-4. dnw window (after turning on the sdmk2440) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-4 4. to see the additional menu, press any key on the dnw window (see figure 3-5). figure 3-5. dnw window to download 5. for downloading a target image, select download only item on the dnw window (see figure 3-6). 6. write the address to download and press enter key (see figure 3-6). note: the target image must be located on 0x30100000 address. figure 3-6. dnw window (to select target image) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-5 7. select usb port on the system menu of the dnw and click transmit to download a target image (see figure 3-7). figure 3-7. dnw window (for usb downloading) 8. select a target image on file open dialog box (see figure 3-8). figure 3-8. dnw window (file open dialog box) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-6 9. for downloading 2440test program, select download & run item on the dnw window and download 2440testprogramlikestep7(seefigure3-9). figure 3-9. dnw window (file open dialog box) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-7 figure 3-10. dnw window (2440test program) 10. write ?5? and press enter key on the dnw window (see figure 3-10). 11. select nand flash type (see figure 3-10). 12. write ?4? and press enter key on the dnw window (see figure 3-10). 13. write the target block number that is the start block to write and press enter key on the dnw window (see figure 3-11). 14. write total byte size of the target image, it should be aligned 0x4000 (one block size) bytes (see figure 3-11). note: 2440test program supports normal nand flash type (k9s1208: smartmedia card, samsung) and advanced nand flash type (k9k2g16: samsung). to write another type of device, it is required to modify the source codes nand.c(normal k9s1208) or k9k2g16.c(advanced k9k2g16). 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-8 figure 3-11. dnw window (nand flash write program) 15. to check the contents of nand flash, select page read function (see figure 3-11). 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-9 auto booting through nand flash the s3c2440 supports auto booting operation with nand flash memory. before power on the smdk2440 system, it must have smartmedia card with boot-loader and os image. notes: 1. jumper j1-b, j2-b, j3-b, j4-b must be ?l?, ?l?, ?l? and ?l? for nand booting. 2. 2440test program and boot-loader, which is supplied by smsung, support normal nand flash type (k9s120: smartmedia card, samsung) and advanced nand flash type (k9k2g16: samsung). to write another type of device, it is required to modify the source codes nand.c(normal k9s1208) or k9k2g16.c(advanced k9k2g16). booting nand flash to make nand flash memory for auto booting, follow the steps: 1. program the boot-loader image to the block 0 of nand flash memory. 2. program the os image to the other blocks of nand flash memory. the os image must be located block 1 to the rest blocks. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-10 nand flash ecc (error checking and correction) the S3C2440A supports ecc algorithm, which is based on xor calculation, for error checking and correction. 1. example of one byte ecc (find error bit) old old ecc code d7 d6 d5 d4 d3 d2 d1 d0 p3 np3 p2 np2 p1 np1 10000000 101010 new new ecc code d7 d6 d5 d4 d3 d2 d1 d0 p4 np3 p2 np2 p1 np1 11000000 000011 s3 ns3 s2 ns2 s1 ns1 oldecc^newecc 101001 p3 = [7]^[6]^[5]^[4] np3 = [3]^[2]^[1]^[0] p2 = [7]^[6]^[3]^[2] np2 = [5]^[4]^[1]^[0] p1 = [7]^[5]^[3]^[1] np1 = [6]^[4]^[2]^[0] p3 np3 p2 np2 p1 np1 old 101010 new 000011 (old ecc) ^ (new ecc) 101001 error code 110 result bit 6 notes: 1. [n] means bit [n] (or dn). 2. the ?10b? value of ?old ecc ^ new ecc? corresponds to ?1b? error code and ?01b? corresponds to ?0b?. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-11 2. example of n byte ecc d7 d6 d5 d4 d3 d2 d1 d0 0th byte [7]0 [6]0 [5]0 [4]0 [3]0 [2]0 [1]0 [0]0 1st byte [7]1 [6]1 [5]1 [4]1 [3]1 [2]1 [1]1 [0]1 2nd byte [7]2 [6]2 [5]2 [4]2 [3]2 [2]2 [1]2 [0]2 3rd byte [7]3 [6]3 [5]3 [4]3 [3]3 [2]3 [1]3 [0]3 ? ? 509th byte [7]509 [6]509 [5]509 [4]509 [3]509 [2]509 [1]509 [0]509 510th byte [7]510 [6]510 [5]510 [4]510 [3]510 [2]510 [1]510 [0]510 511th byte [7]511 [6]511 [5]511 [4]511 [3]511 [2]511 [1]511 [0]511 ? column parity (cpn) cp3 = [7]0^ [7]1^[7]2^[7]3^ ? ^[7]509^[7]510^[7]511 ^[6]0^ [6]1^[6]2^[6]3^ ? ^[6]509^[6]510^[6]511 ^[5]0^ [5]1^[5]2^[5]3^ ? ^[5]509^[5]510^[5]511 ^[4]0^ [4]1^[4]2^[4]3^ ? ^[4]509^[4]510^[4]511 ncp3 = [3]0^ [3]1^[3]2^[3]3^ ? ^[3]509^[3]510^[3]511 ^[2]0^[2]1^[2]2^[2]3^? ^[2]509^[2]510^[2]511 ^[1]0^[1]1^[1]2^[1]3^ ? ^[1]509^[1]510^[1]511 ^[0]0^[0]1^[0]2^[0]3^ ? ^[0]509^[0]510^[0]511 cp2 = [7]0^ [7]1^[7]2^[7]3^ ? ^[7]509^[7]510^[7]511 ^[6]0^ [6]1^[6]2^[6]3^ ? ^[6]509^[6]510^[6]511 ^[3]0^ [3]1^[3]2^[3]3^ ? ^[3]509^[3]510^[3]511 ^[2]0^[2]1^[2]2^[2]3^? ^[2]509^[2]510^[2]511 ncp2 = [5]0^ [5]1^[5]2^[5]3^ ? ^[5]509^[5]510^[5]511 ^[4]0^ [4]1^[4]2^[4]3^ ? ^[4]509^[4]510^[4]511 ^[1]0^[1]1^[1]2^[1]3^ ? ^[1]509^[1]510^[1]511 ^[0]0^[0]1^[0]2^[0]3^ ? ^[0]509^[0]510^[0]511 cp1 = [7]0^ [7]1^[7]2^[7]3^ ? ^[7]509^[7]510^[7]511 ^[5]0^ [5]1^[5]2^[5]3^ ? ^[5]509^[5]510^[5]511 ^[3]0^ [3]1^[3]2^[3]3^ ? ^[3]509^[3]510^[3]511 ^[1]0^[1]1^[1]2^[1]3^ ? ^[1]509^[1]510^[1]511 ncp1 = [6]0^ [6]1^[6]2^[6]3^ ? ^[6]509^[6]510^[6]511 ^ [4]0^ [4]1^[4]2^[4]3^ ? ^[4]509^[4]510^[4]511 ^ [2]0^[2]1^[2]2^[2]3^? ^[2]509^[2]510^[2]511 ^ [0]0^[0]1^[0]2^[0]3^ ? ^[0]509^[0]510^[0]511 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-12 ? row parity (rpn) rp9 = [7]511^[6]511^[5]511^[4]511^[3]511^[2]511^[1]511^[0]511 ^? ^[7]384^[6]384^[5]384^[4]384^[3]384^[2]384^[1]384^[0]384 ^[7]383^[6]383^[5]383^[4]383^[3]383^[2]383^[1]383^[0]383 ^? ^[7]256^[6]256^[5]256^[4]256^[3]256^[2]256^[1]256^[0]256 nrp9 = [7]255^[6]255^[5]255^[4]255^[3]255^[2]255^[1]255^[0]255 ^? ^[7]128^[6]128^[5]128^[4]128^[3]128^[2]128^[1]128^[0]128 ^[7]127^[6]127^[5]127^[4]127^[3]127^[2]127^[1]127^[0]127 ^? ^[7]0^[6]0^[5]0^[4]0^[3]0^[2]0^[1]0^[0]0 rp8 = [7]511^[6]511^[5]511^[4]511^[3]511^[2]511^[1]511^[0]511 ^? ^[7]384^[6]384^[5]384^[4]384^[3]384^[2]384^[1]384^[0]384 [7]255^[6]255^[5]255^[4]255^[3]255^[2]255^[1]255^[0]255 ^? ^[7]128^[6]128^[5]128^[4]128^[3]128^[2]128^[1]128^[0]128 nrp8 = [7]383^[6]383^[5]383^[4]383^[3]383^[2]383^[1]383^[0]383 ^? ^[7]256^[6]256^[5]256^[4]256^[3]256^[2]256^[1]256^[0]256 ^[7]127^[6]127^[5]127^[4]127^[3]127^[2]127^[1]127^[0]127 ^? ^[7]0^[6]0^[5]0^[4]0^[3]0^[2]0^[1]0^[0]0 ? rp1 = [7]511^[6]511^[5]511^[4]511^[3]511^[2]511^[1]511^[0]511 ^[7]509^[6]509^[5]509^[4]509^[3]509^[2]509^[1]509^[0]509 ^[7]507^[6]507^[5]507^[4]507^[3]507^[2]507^[1]507^[0]507 ^? ^[7]1^[6]1^[5]1^[4]1^[3]1^[2]1^[1]1^[0]1 nrp1 = ^[7]510^[6]510^[5]510^[4]510^[3]510^[2]510^[1]510^[0]510 ^[7]508^[6]508^[5]508^[4]508^[3]508^[2]508^[1]508^[0]508 ^[7]506^[6]506^[5]506^[4]506^[3]506^[2]506^[1]506^[0]506 ^? ^[7]0^[6]0^[5]0^[4]0^[3]0^[2]0^[1]0^[0]0 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-13 3. example of 4 bytes ecc (find 1bit error in the 4 bytes) ? old data d7 d6 d5 d4 d3 d2 d1 d0 0th byte 00000000 1st byte 000000 1 0 2nd byte 00000000 3rd byte 00000000 ?newdata d7 d6 d5 d4 d3 d2 d1 d0 0th byte 00000000 1st byte 00 1 000 1 0 2nd byte 00000000 3rd byte 00000000 ? column parity cp3 ncp3 cp2 ncp2 cp1 ncp1 old data 010110 new data 110100 (old ecc) ^ (new ecc) 100010 error code 101 result 5th bit ?rowparity rp3 nrp3 rp2 nrp2 old data 0110 new data 0000 (old ecc) ^ (new ecc) 0110 error code 01 result 1st byte ? result: the 5th bit in the 1st byte is in error. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-14 programming nor flash memory the smdk2440 supports nor flash control interface. there are two types of nor flash memories in smdk2440: amd and intel strata flash memory. the actual methods: ? write image files to amd flash memory with uart. ? write image files to amd flash memory with multi-ice. ? write image files to amd flash memory with realview ice(rvi). ? write image files to amd flash memory with openice32-a900 ? write image files to intel strata flash memory with uart. ? write image files to intel strata flash memory with multi-ice. ? write image files to intel strata flash memory with openice32-a900 writing image files to amd flash memory with uart 1. connect multi-ice and execute ? 2440norom.ini ? file. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-15 2. load the image file (2440test.axf) to execute. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-16 3. execute 2440test code with go command. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-17 4. select " 6:program flash ? on the dnw. note : if you want to download 2440test.bin without multi-ice, then skip the 1, 2 & 3 steps above and download 2440test.bin using the dnw (see execute 2440test without multi-ice). after download 2440test.bin with the dnw, then you can also see the figure below. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-18 5. select the type of memory as am29lv800bb x1 (amd flash) by typing ?a?. 6. select whether you download through uart or multi-ice. ? type ?y? then you can download target files through uart. see the figure below. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-19 7. download target files with the dnw by selecting transmit menu from serial port. ? serial port transmit ? select and download a target file. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-20 8. write input source offset and target offset and type ?y? repeatedly until the source size is reached. the example below shows how to setting source offset and target offset. the size of target file is 0x8a54 bytes. ? write source offset ? 0x0 ? and write target address ? 0x0 ?, and then type ?y?. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-21 ? write source offset ? 0x4000 ? and write target address ? 0x4000 ?, and then type ?y?. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-22 ? write source offset ? 0x6000 ? and write target address ? 0x6000 ?, and then type ?y?. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-23 ? write source offset ? 0x8000 ? and write target address ? 0x8000 ?, and then type ?n?. 9. turnthesmdk2440offandthenon. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-24 writing image files to amd flash memory with multi-ice 1. connect multi-ice and execute ? 2440norom.ini ? file. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-25 2. load the image file (2440test.axf) to execute. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-26 3. select load memory from file? on the file menu of axd. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-27 ? get a target file to 0x31000000 in smdk2440 board. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-28 4. execute 2440test.axf file with go command. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-29 5. select " 6:program flash" on the dnw. note : if you want to download 2440test.bin without multi-ice, then skip the 1, 2 & 3 steps above and download 2440test.bin using the dnw (see execute 2440test without multi-ice). after downloading 2440test.bin with the dnw, then you can also see the figure below. 6. select the type of memory as am29lv800bb (amd) by typing ?a?. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-30 7. select whether you download through uart0 or multi-ice. ? type ?n? then you can see the figure below in the dnw. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-31 8. write input source offset and target offset and type ?y? repeatedly until the source size is reached. see writing the image file to amd flash memory with uart. 9. turn off and on the smdk2440. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-32 writing image files to amd flash memory with realview ice(rvi) to use realview debugger to control flash memory on your chosen debug target, you must: configure your debug target to describe the flash memory chip have access to an appropriate flash method (fme) file. depending on your current target, this might mean that you must first define the memory map to specify the flash memory. flash definition files files to enable you to use supported flash devices are included in the root installation and are located in c:\work\2440\flash directory. files are collected in subdirectories based on the target flash device: board-specific files the board_amd_smdk2440.ame file was contain the ascii format information for an fme file. these files include flash memory programming files. flash-specific files these programming files start with flash_amd.ame. these files contain the algorithm for defining the flash device and are used to create the fme file for your project. to see how these files are used: 1. start up realview debugger without connecting to a target. 2. select project -> open project... to open the project c:\work\2440\flash\flash_amd_smdk2440.prj 3. select project -> project properties... to display the project properties window. 4. left-click on ?*assemble=arm? and ?*compile=arm? in the list of entries and , the left pane. this group is expanded and the contents are displayed in the settings values pane, the right pane. 5. right-click on *sources and select explore from the context menu. this shows the programming file used to create the fme file for the project. 6. left-click on *build in the list of entries. this group is expanded and the contents are displayed in the settings values pane. 7. right-click on *pre_post_link and select explore from the context menu. this shows the link commands used to include the flash definition files for the project. 8. select file -> close window to close the project properties window without making any changes. 9. select tools -> build to create the fme file as defined by the project, that is flash_amd_smdk2440.fme. flashmethodfiles fme files include code to: enable you to write to the flash on your debug target perform read, write, and erase operations describe the way the flash is configured on the bus. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-33 example files are included for all supported flash devices as part of the root installation. defining your target to configure the flash target: 1. start up realview debugger without connecting to a target. 2. select file ->connection -> connect to target... to display the connection control window. 3. right-click on the entry realview-ice and select connection properties... from the context menu. this displays the connection properties window where you can view configuration settings stored in your board file. 4. click on the entry connection=realview ice, in the left pane, to display the settings values in the right pane. 5. edit connection properties select the advanced_information>default>memory_block and, create the amd-flash, sdram, sfr(special function register) memory area for debugging. ? start 1st address of flash (0x0) length length of flash area (0x100000) access flash flash type fme file path (c:\work\2440\flash\flash_amd_smdk2440.fme) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-34 6. change your top of memory variable for your target. because, this flash program using this setting value for stack. so,. you must change this value. 6. select file -> save and close to close the connection properties window. 7. connect to the target using the connection control window. 8. select view -> pane views -> memory map to display the map tab in the process control window, where you canseetheflashmemoryonthesmdk2440. 9. starting the realview debugger and connect realview ice with smdk2440. and, execute ? 2440norom-rv.inc? file by ?include commands from file?? of ?debug? menu. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-35 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-36 10. select the ?upload/download memory file?? of ?debug -> memory/register operations? menu. you can see the upload/download file from/to memory window. now, we must change the options for flash writing. specify the operation and set up the controls, as follows: select the load file into memory radio button. this instructs realview debugger to access the specified memory block, write the contents to flash memory. in the file text box, enter the full pathname of the file to use to read/write memory values. in the type of file section of the dialog, select the data type to be used in the specified file where: obj specifies an object file in the standard executable target format, for example arm-elf for arm-based targets 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-37 raw specifies a data file as a stream of 32-bit values rawhw specifies a data file as a stream of 16-bit values rawb specifies a data file as a stream of 8-bit values ascii specifies a space-separated file of hexadecimal values. define the start location of the memory block. 11. click apply to create and write the specified file. you can see the following figure after changed option. if you didn?t change that you must get some problems during write the image on your amd flash. 12. before writing the image on your flash, you must erase the flash. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-38 now, your flash was completed writing. please, reset the your target. youcanseethefollowingfigureafterfinishedtheflashwritingfunction. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-39 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-40 writing image files to amd flash memory with openice32-a900 openice32-a900 can write image to amd flash memory as multi-ice. however, openice32-a900 provide a flash write program that is easy to use and don?t require arm sdt/ads debugger nor dnw. 1. connect openice32-a900 to pc through usb and to smdk2440 board with 20pin cable. 2. run the flash write program and select connect mds from the file menu. 3. select smu manger from the utility menu and choose a device file, smdk2440. it is used to initialize the system registers in case of there is no boot rom. if you can?t find the file, download the device file smdk2410 instead of smdk2440. after that, edit each value if necessary. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-41 4. select config.. from the flash menu and set the write options as followings ? device: smdk2440 ? set smu: checked ? ram information: base address:30000000 size: 3ffffff ? endian: little ? file 1 page download: checked flash device name: am29lv800bb erase:chip data bus width: 16bit flash address: base address: 0 target address:0 ? target image file: u2440mon.bin 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-42 5. click ok. then the current configuration is displayed in the window. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-43 6. select write from the flash menu. then it starts to erase the specified area of amd flash and write the image to the flash memory. it takes about 10 second. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-44 writing image files to intel strata flash memory with uart 1. connect multi-ice and execute ? 2440norom.ini ? file. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-45 2. load the image file (2440test.axf) to execute. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-46 3. execute 2440test code with go command. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-47 4. select " 6:program flash? on the dnw. note : if you want to download 2440test.bin without multi-ice, then skip the 1, 2 & 3 steps above and download 2440test.bin using the dnw (see execute 2440test without multi-ice). after downloading 2440test.bin with the dnw, then you can also see the figure below. 5. select the type of memory as 28f128j3a (intel strata flash) by typing ?b?. 6. select whether you download through uart0 or multi-ice. ? type ?y? then you can download a target file through uart. see the figure below. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-48 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-49 7. download a target file with the dnw by selecting transmit menu from serial port. ? serial port transmit ? select and download a target file. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-50 8. write input target-offset address. 9. turn the smdk2440 off and again on. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-51 writing image files to intel strata flash memory with multi-ice 1. connect multi-ice and execute ? norom.ini ? file. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-52 2. load the image file (2440test.axf) to execute. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-53 3. select load memory from file? on the file menu of axd. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-54 ? get the target file to 0x31000000 in smdk2440 board. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-55 4. execute 2440test.axf file with go command. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-56 5. select " 6:program flash " on the dnw. note : if you want to download 2440test.bin without multi-ice, then skip the 1, 2 & 3 steps above and download 2440test.bin using the dnw (see execute 2440test without multi-ice). after downloading 2440test.bin with the dnw, then you can also see the figure below. 6. select the type of memory as 28f128j3a (intel strata flash) by typing ?b?. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-57 7. select whether you download through uart0 or multi-ice. ? type?n?thenyoucanseethefigurebelowinthednw. 8. write input target address offset and size of the target file in hexadecimal. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-58 9. turn the smdk2440 off and again on. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-59 writing image files to intel strata flash memory with openice32-a900 openice32-a900 can write image to intel strata flash memory as multi-ice. however, openice32-a900 provide a flash write program that is easy to use and don?t require arm sdt/ads debugger nor dnw. 1. connect openice32-a900 to pc through usb and to smdk2440 board with 20pin cable. 2. set the jumper j1, j2, j3 and j4 as followings and switch on the board j1-b: 2-3 (short) j2-b: 1-2 (short) j3-b: 1-2 (short) j4-b: 2-3 (short) 3. run the flash write program and select connect mds from the file menu. 4. select smu manger from the utility menu and choose a device file, smdk2440. it is used to initialize the system registers in case of there is no boot rom. if you can?t find the file, download the device file smdk2410 instead of smdk2440. after that, edit each value if necessary. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-60 5. select config.. from the flash menu and set the write options as followings ? device: smdk2440 ? set smu: checked ? ram information: base address:30000000 size: 3ffffff ? endian: little ? file1page download: checked flash device name: intel_28f128j3a erase:chip data bus width: 32bit flash address: base address: 0 target address:0 ? target image file: u2440mon.bin 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A programming flash memories 3-61 6. click ok. then the current configuration is displayed in the window. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. programming flash memories S3C2440A 3-62 7. select write from the flash menu. then it starts to erase the specified area of intel strata flash and write the image to the flash memory. it takes about 10 second. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-1 system design overview the S3C2440A, samsumg's 16/32-bit risc microcontroller is cost-effective and high performance microcontroller solution for hand-held devices and general applications. the S3C2440A has the following integrated on-chip functions: ? 1.2v int., 2.5v/3.3v memory, 3.3v external i/o microprocessor with 16kb i-cache/16kb d-cache/mmu ? external memory controller (sdram control and chip select logic) ? lcd controller (up to 4k color stn and 256k color tft) with 1-ch lcd-dedicated dma ? 4-ch dmas with external request pins ? 3-ch uart (with irda1.0, 64-byte tx fifo, and 64-byte rx fifo) / 2-ch spi ? 1-ch multi-master iic-bus/1-ch iis-bus controller ? ac97 audio codec interface ? sd host interface version 1.0 & multi-media card protocol version 2.11 compatible ? 2-port usb host /1-port usb device (ver 1.1) ? 4-ch pwm timers & 1-ch internal timer ? watch dog timer ? 130 general purpose i/o ports / 58 interrupt sources ? power control: normal, slow, idle and power-off mode ? 8-ch 10-bit adc and touch screen interface ? rtc with calendar function ? on-chip clock generator with pll 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-2 applicable system with S3C2440A the S3C2440A, samsumg's 16/32-bit risc microcontroller offers various functions and high efficiencies. in addition to the high performance, the S3C2440A offers low current consumption, ensuring low costs. the followings are sample applications that can be designed with the S3C2440A: ? gps ? personal data assistance (pda) ? fish finder ? portable game machine ? fingerprint identification system ? car navigation system ? smart phone ? mobile information terminal (mit) ? web screen phone ? web pad 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-3 memory interface design boot rom design after the system reset, the S3C2440A accesses 0x00000000 address, configuring some system variables. therefore, this special code (boot rom image) should be located on the address 0x00000000. bus width of boot rom can be selected by setting om[1:0] pins. table 4-1. data bus width for rom bank 0 om[1:0] data bus width 00 nand boot 01 16-bit (half-word) 10 32-bit (word) 11 test mode nand boot design figure 4-1 shows a design with nand boot. om[1] om[0] data[7:0] ale nfce cle s3c2440x md[7:0] ale nce cle nand flash nbusy nwe nrd r/nb nfwe nfre figure 4-1. nand boot design making nand boot image when making a nand boot loader image, you can use the binary file that is made from compiling and linking. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-4 halfword boot rom design with byte eeprom/flash figure 4-2 shows a design with half-word boot rom with byte eeprom/flash. om[1] addr[24:1] data[15:0] ngcs0 noe nwbe[1:0] s3c2440x addr[21:0] data[7:0] nce noe nwe eeprom/ flash addr[21:0] data[7:0] nce noe nwe eeprom/ flash data[7:0] nwbe[0] data[15:8] nwbe[1] om[0] figure 4-2. half-word boot rom design with byte eeprom/flash making halfword rom image with byte eeprom/flash when make half-word rom image, you can split two image files, even and odd. table 4-2. relationship rom image and endian big endian little endian data[7:0] odd even data[15:8] even odd 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-5 halfword boot rom design with halfword eeprom/flash figure 4-3 shows a design with half-word boot rom with byte eeprom/flash. om[1] addr[24:1] data[15:0] ngcs0 noe s3c2440x a[21:0] dq[15:0] nce noe nwe eeprom/ flash om[0] nwe data[15:0] figure 4-3. the halfword boot rom design with halfword eeprom/flash 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-6 word boot rom design with byte eeprom/flash figure 4-4 shows a design with word boot rom with byte eeprom/flash. om[1] addr[24:2] data[31:0] ngcs0 noe nwbe[3:0] s3c2440x a[21:0] dq[7:0] nce noe nwe eeprom/ flash om[0] a[21:0] dq[7:0] nce noe nwe eeprom/ flash a[21:0] dq[7:0] nce noe nwe eeprom/ flash a[21:0] dq[7:0] nce noe nwe eeprom/ flash data[31:24] data[23:16] data[15:8] nwbe[1] nwbe[2] nwbe[3] nwbe[0] data[7:0] figure 4-4. the word boot rom design with byte eeprom/flash 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-7 making word rom image with byte eeprom/flash when you make a word rom image, you can split it into four image files. a b c d e f g h i j k . . . 1 2 3 4 5 6 7 8 9 10 0 addr. rom image size: byte data[31:24] data[23:16] data[15:8] data[7:0] big endian little endian a, e, i,... b, f,... c, g,... d, h,... d, h,... c, g,... b, f,... a, e, i,... figure 4-5. relationship of rom image and endian 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-8 memory bank design and control the S3C2440A has six rom/sram banks (including bank0 for boot rom) and two rom/sram/sdram banks. the system manager on the S3C2440A can control access time, data bus width for each bank by s/w. the access time of rom/sram banks and sdram banks is controlled by bankcon0~5 and bankcon6~7 control register on the system manager. the data bus width for each rom/sram banks is controlled by bwscon control register. the rom bank0 is used for boot rom bank, therefore data bus width of bank0 is controlled by h/w. om[1:0] is used for this purpose. the control of bwscon, bankcon0-7, refresh, banksize, and mrsrb6/7 is performed during the system reset. a sample code for special register configuration is described below. sample code for special register configuration ;set memory control registers ldr r0,=smrdata ldr r1,=bwscon ;bwscon address add r2, r0, #52 ;end address of smrdata 0 ldr r3, [r0], #4 str r3, [r1], #4 cmp r2, r0 bne %b0 . . . . . . smrdata dcd 0x22111120 ;bwscon dcd 0x00000700 ;gcs0 dcd 0x00000700 ;gcs1 dcd 0x00000700 ;gcs2 dcd 0x00000700 ;gcs3 dcd 0x00000700 ;gcs4 dcd 0x00000700 ;gcs5 dcd 0x00018005 ;gcs6 sdram(trcd=3,scan=9) dcd 0x00018005 ;gcs7 sdram(trcd=3,scan=9) dcd 0x008e0000+1113 ;refresh(refen=1,trefmd=0,trp=2 clk, ; trc=7 clk, tchr=3 clk,ref cnt) dcd 0x32 ;bank size, 128mb/128mb dcd 0x30 ;mrsr 6(cl=3 clk) dcd 0x30 ;mrsr 7(cl=3 clk) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-9 rom/sram bank design the rom/sram banks 1-7 can have a variety of width of data bus, and the bus width is controlled by s/w. a sample design for rom/sram bank 1-7 is shown in figure 4-6, figure 4-7, figure 4-8 and figure 4-9. addr[24:0] data[7:0] ngcs[7:1] noe nwe s3c2440x a[21:0] dq[7:0] nce noe nwe eeprom/ sram data[7:0] nwe figure 4-6. one-byte eeprom/sram bank design 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-10 addr[24:1] data[15:0] ngcs[7:1] noe nwbe[1:0] s3c2440x a[21:0] dq[7:0] nce noe nwe eeprom/ sram a[21:0] dq[7:0] nce noe nwe eeprom/ sram data[7:0] nwbe[0] data[15:8] nwbe[1] figure 4-7. halfword eeprom/sram bank design addr[24:1] data[15:0] ngcs[7:1] noe nwe s3c2440x a[21:0] dq[15:0] nce noe nwe sram data[15:0] nwe nwbe[0] nwbe[1] nlb nub nwbe[0] nwbe[1] noe figure 4-8. halfword sram bank design with halfword sram 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-11 addr[24:2] data[31:0] ngcs[7:1] noe nwbe[3:0] s3c2440x a[21:0] dq[7:0] nce noe nwe eeprom/ sram a[21:0] dq[7:0] nce noe nwe eeprom/ sram a[21:0] dq[7:0] nce noe nwe eeprom/ sram a[21:0] dq[7:0] nce noe nwe eeprom/ sram data[7:0] nwbe[0] data[15:8] nwbe[1] data[23:16] nwbe[2] data[31:24] nwbe[3] figure 4-9. word eeprom/sram bank design 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-12 sdram bank design for S3C2440A table 4-3. sdram bank address configuration bank size bus width base component memory configuration bank address 2mbyte x8 16mbit (1m x 8 x 2bank) x 1 a20 x16 (512k x 16 x 2b) x 1 4mb x8 16mb (2m x 4 x 2b) x 2 a21 x16 (1mx8x2b) x2 x32 (512k x 16 x 2b) x 2 8mb x16 16mb (2m x 4 x 2b) x 4 a22 x32 (1mx8x2b) x4 x8 64mb (4m x 8 x 2b) x 1 x8 (2m x 8 x 4b) x 1 a[22:21] x16 (2m x 16 x 2b) x 1 a22 x16 (1m x 16 x 4b) x 1 a[22:21] x32 (512k x 32 x 4b) x 1 16mb x32 16mb (2m x 4 x 2b) x 8 a23 x8 64mb (8m x 4 x 2b) x 2 x8 (4m x 4 x 4b) x 2 a[23:22] x16 (4mx8x2b) x2 a23 x16 (2m x 8 x 4b) x 2 a[23:22] x32 (2m x 16 x 2b) x 2 a23 x32 (1m x 16 x 4b) x 2 a[23:22] x8 128mb (4m x 8 x 4b) x 1 x16 (2m x 16 x 4b) x 1 32mb x16 64mb (8m x 4 x 2b) x 4 a24 x16 (4m x 4 x 4b) x 4 a[24:23] x32 (4mx8x2b) x4 a24 x32 (2m x 8 x 4b) x 4 a[24:23] x16 128mb (4m x 8 x 4b) x 2 x32 (2m x 16 x 4b) x 2 x8 256mb (8m x 8 x 4b) x 1 x16 (4m x 16 x 4b) x 1 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-13 table 4-3. sdram bank address configuration (continued) bank size bus width base component memory configuration bank address 64mb x32 128mb (4m x 8 x 4b) x 4 a[25:24] x16 256mb (8m x 8 x 4b) x 2 x32 (4m x 16 x 4b) x 2 x8 512mb (16m x 8 x 4b) x 1 128mb x32 256mbit (8m x 8 x 4bank) x 4 a[26:25] x8 512mb (32m x 4 x 4b) x 2 x16 (16mx8x4b) x2 the required sdram interface pin is cke, sclk, nscs[1:0], nscas, nsras, dqm[3:0] and addr[12]/ap. the sample design with sdram is shown in figure 4-10 and figure 4-11. figure 4-10. halfword sdram design with halfword component 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-14 addr[14:2] ba data[31:0] sclk nras[0]/nscs[0] ncas3/nsras ncas2/nscas nwe nwbe[3:0]/dqm[3:0] s3c2440x addr[14:2] data[15:0] dqm[1:0] sync dram a[12:0] ba dq[15:0] clk ncs nsras nscas nwe ldqm/udqm addr[14:2] data[31:16] dqm[3:2] sync dram a[12:0] ba dq[15:0] clk ncs nsras nscas nwe ldqm/udqm figure 4-11. word sdram design with half-word component 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-15 pc card (pcmcia) interface application using cl-pd6710 (cirrus logic) the pc card (pcmcia card) can be interfaced with S3C2440A using following components: ? cl-pd6710 from cirrus logic ? tps2211 from texas instruments we tested the pc card interface by accessing the card information structure (cis) in the modem card as figure 4-12, using following test code. file name file descriptions pd6710.h cl-pd6710 register definitions pd6710.c cl-pd6710 pc card program figure 4-12. pc card cis access example on S3C2440A 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-16 10base-t ethernet controller (cs8900a) interface the 10base-t ethernet can be supported on S3C2440A using following components: ? cs-8900a from cirrus logic ? xfmrs xf10b11a-comb1-2s is ethernet rj45 with transformer. iis audio codec (uda1341ts) connection with S3C2440A the S3C2440A iis interface example circuit is as follows: ? uda1341ts from philips semiconductors. ? the l3 interface of philips (l3mod, l3clock and l3data) is realized by general i/o port. ? refer to the sample code of audio application which plays gpcm file. bck ws datai l3mode l3clock l3data voutr voutl qmute uda1341ts sysclk vinl2 vinl1 microphone in datao i2ssdi i2slrck i2ssdo cdclk i2ssclk gpb4 gpb3 gpb2 speaker out figure 4-13. uda1341ts connection with S3C2440A ac97 audio codec (stac9767) connection with S3C2440A the S3C2440A ac97 interface example circuit is as follows: ? stac9767 from sigmatel. ? the ac97 interface (ac_sync, ac_bit_clk, ac_nreset, ac_sdata_in and ac_sdata_out) is realized between S3C2440A and stac9767. ? refer to the sample code of audio application which plays gpcm file. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-17 st ac9 7 67 sdata_out sdata_in bit_clk sync reset# hp_ou t_l hp_out_r line_in_l line_in_r mic1 x9 7 sdo x97sdi x97bitclk x9 7 s yn c x97resetn headphone line in microphone figure 4-14. stac9767 connection with S3C2440A lcd connection with S3C2440A the S3C2440A lcd interface example circuit is as follows: ? ug-32f04 (320x240 mono stn lcd) from samsung display devices co., ltd. (refer to figure 4-14) ? tl497can can be used to make vee (-25v). ? ug-24u03a (320x240 mono stn lcd) from samsung display devices co., ltd. (refer to figure 4-15) ? vee is generated by the circuit on lcd module. ?vlis2.4vtypically. ? dispon h: display on, l: display off ? nel_on h: el off l: el on ? khs038aa1aa-g24 (256 color stn lcd) from kyocera co. (refer to figure 4-16) ? disp signal can be made using i/o port, or power control circuit or nreset circuit. ? v1-v5 can be made using the power circuit recommended by the lcd specification. ? lts350q1-pe1 (256k color tft lcd) from samsung electronics co., ltd. (refer to figure 4-17) ? vdd_lcdi is typically 3.3v. ? lp104v2-w (262,144 color tft lcd, 10.4?) from lg philips (refer to figure 4-18) ? vdd_lcdi is typically 3.3v. ? v16c6448ab (640x480 tft lcd) from primeview (refer to figure 4-19) ? vdd_lcdi, vd and control signal are typically 5.v. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-18 vframe vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 vee v0 vdd vss d3 d2 d1 d0 vss cl2 cl1 flm nc fg x vdd vee vee r 10k vline vclk vd0 vd1 vd2 vd3 (from s3c2440x) ug-32-f04-wcbn0-a figure 4-15. ug-32f04 connection with S3C2440A (320x240 mono stn lcd) d2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 d1 d0 vl vss4 vcc drdy doff vss3 fpshift vss2 fpline fpframe vss1 vframe vline port(dispon) vm (from s3c2440x) ug24u03 a d3 vss5 vd0 vd1 vd2 vd3 3.3v x x x x x vclk x2 y1 x1 y2 vss6 el-vcc el-on port(nel-on) vee 3.3v figure 4-16. ug24u03a connection with S3C2440A (320x240 mono stn lcd) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-19 vframe d7 v5 v4 v3 v2 v1 v0 df vss vdd vdd disp cp load flm vline vclk vd7 vd6 vd5 vd4 (from s3c2440x) khs038aa1aa-g24-95-14 d6 d3 d4 d5 d2 d1 d0 vm vd3 vd2 vd1 vd0 dispoff vdd vm v0 v1 v2 v3 v4 vd7 vd6 vd5 vd0 vd4 vd3 vd2 vd1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 figure 4-17. khs038aa1aa-g24 connection with S3C2440A (256 color stn lcd) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-20 (from s3c2440x) fh12_50p 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 voff von lavdd ldvdd vcom lvframe lvline rev llend ld18 ld19 ld20 ld21 ld22 ld23 ld10 ld11 ld12 ld13 ld14 ld15 lvclk inv vref0 vref1 vref2 vref3 vref4 vref5 vref6 lvm ld2 ld3 ld4 ld5 ld6 ld7 figure 4-18. lts350q1-pe1 connection with S3C2440A (samsung 3.5? transflective tft lcd) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-21 vd18 g2 g1 g0 gnd r5 r4 r3 r2 r1 r0 gnd vsync hsync clk gnd vclk vline (from s3c2440x) df9b-31s-1v g3 gnd g5 g4 b0 b1 b2 vframe vd20 vd21 vd22 vd23 vd19 vd10 vd12 vd13 vd14 vd4 vd15 vd2 vd3 b5 b4 gnd vdd vdd dtmg nc nc vd5 vd7 vm pvdd_lcdi vd6 vd11 b3 pvdd_lcdi 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 figure 4-19. lp104v2-w connection with S3C2440A (lg philips 10.4? tft lcd) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-22 g2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 g1 g0 gnd r4 r3 r2 r1 r0 gnd vsync hsync clk gnd vclk hsync vd11 vd12 (from s3c2440x) v16c6448ab g3 g4 vd5 vd6 vd7 vd8 g5 gnd b0 b1 b2 b3 b4 r5 vcc 25 26 27 28 29 vcc denb gnd b5 30 r/l 31 u/d vsync vd13 vd14 vd15 vd9 vd10 vd0 vd1 vd2 vd3 vd4 vden vdd _ lcdi(5v) figure 4-20. v16c6448ab connection with S3C2440A (tft lcd) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-23 system design with debugger support multi-ice the S3C2440A has an embedded ice logic that provides debug solution from arm. multi-ice enables you to debug software running on the S3C2440A. embedded ice logic is accessed through the test access port (tap) controller on the S3C2440A using the jtag interface. jtag port for embedded ice interface when you build a system with the S3C2440A embedded ice interface, you should design a jtag port for multi- ice interface. usually, the interface connector is a 20-way box header, and this plug is connected to the embedded ice logic interface module using 20-way idc socket. the jtag port signals, ntrst, tdi, tms and tck have to be connected to pulled-up register (10k ohm) externally. the pin configuration and a sample design are described in figure 4-21 and figure 4-22, respectively. pin name function 1vtrefsystempower 3 ntrst test reset, active low (connected pull-up reg.) 5 tdi test data in (connected pull-up reg.) 7 tms test mode select (connected pull-up reg.) 9 tck test clock (connected pull-up reg.) 11 rtck return test clock (connected pull-down reg.) 13 connected to nreset and ntrst through 470 ohm resister 4, 6, 8, 10, 12, 14, 16, 18, 20 gnd system ground 2 1 4 3 6 5 8 7 10 9 12 11 14 13 15 16 18 17 20 19 2 vsupply system power 15 nsrst 17 dbgrq nc 19 dbgack nc tdo test data out figure 4-21. multi-ice interface of jtag connector 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-24 s3c2440x nreset ntrst tdi tms tck gnd vdd 10k 10k 10k 10k 2 4 6 8 10 12 14 1 3 5 7 9 11 13 nreset (from reset logic) 16 18 20 15 17 19 tdo tdo x x 470 ohm or switch multi-ice use : off multi-ice not use : on 330 ohm figure 4-22. multi-ice interface design example 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. S3C2440A system design 4-25 checkitemsforsystemdesignwithS3C2440A when you design a system with the S3C2440A, you should check a number of items to build a good system. the check items are described below. ? the om[3:0] pin has to be configured. ? if extclk pin is used for mpll and upll, xtipll has to be connected to vdd. if xtipll pin is used for mpll and upll, extclk has to be connected to vdd. ? if an input pin is unused, connect the pin to vdd or gnd. if the pin is floated, S3C2440A may not operate. 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. system design S3C2440A 4-26 notes 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. revision history 1. revision 0.1(2003/11/28) - preliminary version for smdk2440 ver 0.18 by y. h. lee item page no. remark 1-1 following words are added - ac97 interface 1-2 ac97 block is added into ?figure 1-1. smdk2440 function block diagram?. 1-3 following item is added into ?features?. - ac97 interface (sound codec audio input/output) 1-5 ac97 block is added into ?figure 1-3. detailed smdk2440 board diagram?. 1-19 new contents on iis & ac97 interface configuration are added into smdk 2440 app notes. ac97 4-16 4-17 new contents and figure 4-14 on ac97 connection with s3c2440x are added into app notes. camera 1-18 camera connector pin assignment has been changed in the ?camera interface connector on smdk2440?. programming intel strata flash with openice32 3-51 changed as follows: -before j1: 2-3 (short) j2: 1-2 (short) j3: 1-2 (short) j4: 2-3 (short) - after j1-b: 2-3 (short) j2-b: 1-2 (short) j3-b: 1-2 (short) j4-b: 2-3 (short) 2004.03.27 preliminary product information describes products that are in development, for which full characterization data and associated errata are not yet available specifications and information herein are subject to change without notice. 2. revision 0.11(2004/01/16) - preliminary version for smdk2440 ver 0.18 by y. h. lee item page no. remark overview 1-1 the cpu board and base board revision number for S3C2440A is added. cpu board version rev 0.18 base board version rev 0.18 1-2 the mcu name is changed from s3c2440x to S3C2440A. 1-4 in the figure 1-2, the mcu name is changed from s3c2440x to S3C2440A. 1-5 in the figure 1-3, the mcu name is changed from s3c2440x to S3C2440A. microprocessor name 2-1 in the figure 2-1, the mcu name is changed from s3c2440x to S3C2440A. iis&ac97 interface 1-19 changed as follows: register => resistor smdk power plane 1-4 new step-down voltage controller block (u13-c) is added to smdk power plane. smdk2440 system configurations 1-6 changed as follows: j35-c => j3-c |
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